Packaging a sealed cavity in an electronic device

ABSTRACT

An electronic device includes a package substrate, a circuit assembly, and a housing. The circuit assembly is mounted on the package substrate. The circuit assembly includes a first sealed cavity formed in a device substrate. The housing is mounted on the package substrate to form a second sealed cavity about the circuit assembly.

CROSS-REFERENCE TO RELATED APPLICATION

This application is a divisional of U.S. patent application Ser. No. 15/696,245 filed Sep. 6, 2017, the entirety of which is incorporated herein by reference.

BACKGROUND

Various applications require that the integrity of a sealed chamber be maintained to insure proper equipment operation. For example, for a housing intended to maintain a low internal pressure, a leak in the housing may allow ingress of gas that dilutes or contaminates the contents of the housing to the extent that housing contents are no longer useable for the intended purpose. In one particular application, the waveguide of a chip-scale atomic clock contains a selected vapor and requires that a predetermined rate of leakage be maintained to insure the pressure of the vapor and proper operation of the clock.

SUMMARY

Techniques for controlling and monitoring leakage into a sealed cavity of a semiconductor device are described herein. In one embodiment, an electronic device includes a package substrate, a circuit assembly, and a housing. The circuit assembly is mounted on the package substrate. The circuit assembly includes a first sealed cavity formed in a device substrate. The housing is mounted on the package substrate to form a second sealed cavity about the circuit assembly.

In another embodiment, a clock generator includes a first hermetically sealed cavity, clock generation circuitry, and a housing. The first hermetically sealed cavity is formed in a first substrate. The first hermetically sealed cavity contains dipolar molecules. The clock generation circuitry is configured to drive a signal into the first hermetically sealed cavity, and to generate an output clock signal at a frequency of quantum rotational state transition of the dipolar molecules. The housing encloses the first hermetically sealed cavity and the clock generation circuitry. The housing forms a second hermitically sealed cavity.

In a further embodiment, an electronic device includes a package substrate, a circuit assembly, a first pressure sensor, a second pressure sensor, and a housing. The circuit assembly is mounted on the package substrate. The circuit assembly includes a first sealed cavity. The first sealed cavity includes a channel formed in a device substrate and a sealing plate bonded to the device substrate. The first pressure sensor is coupled to the sealing plate and is configured to measure pressure within the first sealed cavity as a function of displacement of the sealing plate. The housing is mounted on the package substrate to form a second sealed cavity about the circuit assembly. The second pressure sensor is coupled to the housing and configured to measure pressure within the second sealed cavity as a function of displacement of the housing.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a diagram of an electronic device packaged to provide very low leakage to a chip scale cavity in accordance with various embodiments.

FIG. 2 illustrates leakage conditions in the electronic device of FIG. 1 in accordance with various embodiments.

FIG. 3 shows a relationship of the leakage rate of an outer cavity to the leakage rate of an inner cavity, where the inner cavity is disposed within the outer cavity of an electronic device in accordance with various embodiments.

FIG. 4 shows the relationship of the volume of an outer cavity to the leakage rate of an inner cavity, where the inner cavity is disposed within the outer cavity of an electronic device in accordance with various embodiments.

FIG. 5 shows pressure over time for a first cavity that is not enclosed within a second outer cavity.

FIG. 6 shows pressure over time for an inner cavity and an outer cavity, where the inner cavity is disposed within the outer cavity of an electronic device in accordance with various embodiments.

FIG. 7 shows a diagram of an electronic device packaged to provide very low leakage to a chip scale cavity that includes sensors for monitoring the pressure in cavities of the device in accordance with various embodiments.

FIG. 8 shows pressure related displacement of a sealing plate that hermetically seals a cavity formed in a semiconductor substrate in accordance with various embodiments.

FIG. 9 shows resonant signature tracking employed to determine the pressure within an inner or outer cavity of an electronic device in accordance with various embodiments.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

In this description, the term “couple” or “couples” means either an indirect or direct wired or wireless connection. Thus, if a first device couples to a second device, that connection may be through a direct connection or through an indirect connection via other devices and connections. Also, in this description, the recitation “based on” means “based at least in part on.” Therefore, if X is based on Y, then X may be a function of Y and any number of other factors.

Maintaining reliable operation of a millimeter-wave chip scale atomic clock (mmWCSAC) over a reasonable lifetime (e.g., 3-10 years) requires that portions of the clock operate in a stable, hermetically sealed environment. For example, reliable operation over time may require a wafer scale hermetic seal with a very low leakage rate (e.g., 1E-14 atm-cc/s). Unfortunately, building and validating wafer scale hermetic cavities with such low leakage rates is beyond the capabilities of conventional packaging techniques. Even if such systems can be fabricated in the future, testing hermeticity to such levels remains at the very limits of conventional test facilities. If pressure or humidity within the mmWCSAC drifts too far from the manufacturing specifications, the accuracy of the mmWCSAC may be affected. Therefore the hermeticity and packaging are important to enabling mmWCSAC technology.

The electronic devices described herein provide a very low leakage rate to a cavity formed in a semiconductor material. The hermetic seal associated with such a cavity is incapable of supporting the required leakage rate. Rather, the electronic devices include a housing that surrounds the cavity and circuitry associated with cavity. The housing provides a secondary hermetic seal that operates in conjunction with the hermetic seal associated with the cavity to provide the very low leakage rate. Embodiments of the electronic devices described herein also include sensors that measure the pressure in the cavity and sensors that measure the pressure in the housing. In various embodiments of the electronic devices, the sensors are strain gauges or acoustic transducers.

FIG. 1 shows a diagram of an electronic device 100 packaged to provide very low leakage to a chip scale cavity in accordance with various embodiments. In some embodiments, the electronic device 100 is a clock generator, such as mmWCSAC. The electronic device 100 includes a package substrate 102, a circuit assembly 103, and a housing 110. The circuit assembly 103 is mounted to the package substrate 102. The package substrate 102 is formed of ceramic or other suitable material. The circuit assembly 103 includes a device substrate 104, a sealing plate 112, and control circuitry 108. The device substrate 104 is bonded to the package substrate 102. The device substrate 104 includes a cavity 106. The cavity 106 is formed by etching a channel into the device substrate 104. In some embodiments, for example embodiments of a mmWCSAC, the surfaces of the cavity 106 are plated with metal to form a waveguide and the cavity contains dipolar molecules. For example, some embodiments of the cavity 106 contain water molecules in vapor form. The internal pressure of the cavity 106 is set to an optimum value at manufacture by controlling the number of the dipolar molecules present in the cavity 106. In embodiments of the electronic device 100 that implement a mmWCSAC, the frequency of quantum rotational state transition of the dipolar molecules serves as frequency reference for a clock signal generated by the device 100. If the pressure within the cavity 106 varies from the optimum value set at manufacture by an excessive amount, then the accuracy of the clock signal may be affected.

The sealing plate 112 is bonded to the device substrate 104 to hermetically seal the cavity 106. The sealing plate 112 is a dielectric (e.g., glass) membrane in some embodiments. The control circuitry 108 is bonded to metal plated to the top of the sealing plate 106. In embodiments of the electronic device 100 that implement a mmWCSAC, the control circuitry 108 includes clock generation circuitry to drive signal into the cavity 106, to receive signal from the cavity 106, and to process the signal received from the cavity 106 to generate a clock signal that is locked to the frequency of quantum rotational state transition of the dipolar molecules contained in the cavity 106.

To provide a device operational life of at least three years, embodiments of the electronic device 100 ensure a very low rate of leakage into the cavity 106. The principal path for leakage that degrades the performance of the electronic device 100 is from the ambient environment into the cavity 106. If it is assumed that the performance of the electronic device 100 is acceptable with a doubling of pressure within the cavity 106, then an acceptable leakage rate for the cavity 106 can be determined. The leakage rate for the cavity 106 alone can be determined as:

$\begin{matrix} {{\Delta \; P} = {\left( {P_{ext} - P_{int}} \right)\left( {1 - e^{{- L}\; {t/V}}} \right)}} & (1) \end{matrix}$

s where:

ΔP is change in pressure in the cavity over time;

P_(ext) is pressure external to the cavity;

P_(int) is internal pressure of the cavity;

L is rate of leakage into the cavity;

V is volume of the cavity; and

t is time.

The cavity 106 alone must have an extremely low leakage rate to maintain intra-cavity pressure within an acceptable range. Embodiments of the electronic device 100 allow the leakage rate of the cavity 106 to be relaxed by disposing the housing 110 about the circuit assembly 103. In some embodiments of the electronic device 100, the housing 110 is mounted to the package substrate 102 to form a hermetically sealed cavity 114 about the device substrate 102 and control circuitry 108. Thus, in the electronic device 100, the cavity 106 formed in the device substrate 104 is enclosed within an outer cavity 114 formed by the housing 110. In some embodiments, the housing 110 is metal, glass, or another material, or combination of materials. For the nested cavities of the electronic device 100, the leakage rates of the two cavities 106 and 114 are coupled as:

$\begin{matrix} {{\Delta \; P_{1}} = {\left( {P_{ext} - P_{1}} \right)\left( {1 - e^{{- L_{1}}\; {t/V_{1}}}} \right)}} & (2) \\ {{\Delta \; P_{2}} = {\left( {P_{1} - P_{2}} \right)\left( {1 - e^{{- L_{2}}\; {t/V_{2}}}} \right)}} & (3) \end{matrix}$

s where:

ΔP₁ is change in pressure in the outer cavity 114;

P_(ext) is pressure external to the outer cavity 114;

P₁ is internal pressure of the outer cavity 114;

L₁ is rate of leakage into the outer cavity 114;

V₁ is volume of the outer cavity 114;

ΔP₂ is change in pressure in the inner cavity 106;

P₂ is internal pressure of the inner cavity 106;

L₂ is rate of leakage into the inner cavity 106;

V₂ is volume of the inner cavity 106; and

t is time.

FIG. 2 illustrates leakage conditions in the electronic device 100. The pressure of the atmosphere (P_(atm)) external to the outer cavity 114 induces leakage L₁ into the outer cavity 114. The outer cavity 114 has volume V₁ and internal pressure P₁. The inner cavity 106 has volume V₂ and internal pressure P₂. The difference in pressures of the internal and external cavities induces leakage L₂ from the outer cavity 114 into the inner cavity 106. Given values for the volumes of the cavities 106 and 114 and average change in pressure in the outer cavity 114 (ΔP₁), the relationship between leakage rates and volumes of the cavities 106 and 114 can be determined.

FIG. 3 shows the relationship of the leakage rate of the inner cavity 106 to the leakage rate of the outer cavity 114. FIG. 3 shows that to achieve a given overall leakage rate into the inner cavity 106, the individual leakage rate of the inner cavity 106 may be increased as the leakage rate of the outer cavity 114 is decreased. Similarly, to achieve the given overall leakage rate, the individual leakage rate of the inner cavity 106 must be decreased as the leakage rate of the outer cavity 114 is increased.

FIG. 4 shows the relationship of the leakage rate of the inner cavity 106 to the volume of an outer cavity 114. FIG. 4 shows that to achieve a given overall leakage rate into the inner cavity 106, the individual leakage rate of the inner cavity 106 may be increased as the volume of the outer cavity 114 is increased. Similarly, to achieve the given overall leakage rate, the individual leakage rate of the inner cavity 106 must be decreased as the volume of the outer cavity 114 is decreased.

To maintain pressure suitable for operation of a mmWCSAC in the cavity 106, without the outer cavity 114 formed by the housing 110, a leakage rate on the order of 1E-14 atm-cc/s is required. FIG. 5 shows pressure over time for the inner cavity 106 without the outer cavity 114. FIG. 5 shows that given an initial pressure of 10⁻⁴ atm in the cavity 106 and a leakage rate of 1E-14 atm-cc/s into the cavity 106, without the outer cavity 114, the pressure within the cavity 106 doubles in less than 3.5 years. As previously noted, a leakage rate of 1E-14 atm-cc/s is difficult or impossible to achieve with conventional manufacturing techniques.

FIG. 6 shows pressure over time in the inner cavity 106 with the outer cavity 114 as in the electronic device 100. In FIG. 6, the leakage rate into the outer cavity 114 is 1E-10 atm-cc/s and the leakage rate into the inner cavity 106 is 1E-11 atm-cc/s. The initial pressure in the cavities 106 and 114 is 10⁻⁴ atm. FIG. 6 shows that the in the electronic device 106 the pressure within the cavity 106 doubles in just over four years. Accordingly, embodiments of the electronic device 100 allow the effective leakage rate of the cavity 106 to be greatly reduced (e.g., by three orders of magnitude or more (e.g., 1000, 5000, etc.)) relative to a device that lacks the outer cavity 114. Thus, the electronic device 100 provides a reasonable operating life while relaxing the requirements of individual cavity hermeticity by a factor of 1000 or more and allowing the device's hermetic seals to be manufactured using conventional processes.

Some embodiments of the electronic device 100 also include features for monitoring the pressure within the inner cavity 106 and the outer cavity 114. Monitoring cavity pressure allows the operational state of the electronic device 100 to be verified under operating conditions. If the pressure in the cavity 106 exceeds a predetermined level, then some embodiments generate a notification signal to alert higher level systems of the condition of the device 100. FIG. 7 shows a diagram of an electronic device 700 packaged to provide very low leakage to a chip scale cavity that includes sensors for monitoring the pressure in the cavities of the device in accordance with various embodiments. The electronic device 700 is an embodiment of the electronic device 100.

The electronic device 700 includes package substrate 102, a circuit assembly 103, a housing 110, and pressure sensors 702 and 704. The circuit assembly 103 is mounted to the package substrate 102. The circuit assembly 103 includes a device substrate 104, a sealing plate 112, and control circuitry 108. The device substrate 104 is bonded to the package substrate 102. The device substrate 104 includes a cavity 106. The cavity 106 is etched into the device substrate 104. In some embodiments, the surfaces of the cavity 106 are plated with metal to form a waveguide and the cavity contains dipolar molecules. For example, some embodiments of the cavity 106 contain water molecules in vapor form. The internal pressure of the cavity 106 is set to an optimum value at manufacture by controlling the number of the dipolar molecules present in the cavity 106. In embodiments of the electronic device 100 that implement a mmWCSAC, the quantum rotation frequency of the dipolar molecules serves as frequency reference for a clock signal generated by the device 100. If the pressure within the cavity 106 varies from the optimum value set at manufacture by an excessive amount, then the accuracy of the clock signal may be affected.

The sealing plate 112 is bonded to the device substrate 104 to hermetically seal the cavity 106. The sealing plate 112 is a dielectric (e.g., glass) membrane in some embodiments. The control circuitry 108 is bonded to metal plated to the top of the sealing plate 106. In embodiments of the electronic device 700 that implement a mmWCSAC, the control circuitry 108 includes clock generation circuitry to drive signal into the cavity 106, to receive signal from the cavity 106, and to process the signal received from the cavity 106 to generate a clock signal that is locked to the quantum rotation frequency of the dipolar molecules contained in the cavity 106.

Embodiments of the electronic device 700 allow the leakage rate of the cavity 106 to be relaxed by disposing the housing 110 about the device substrate 104. In some embodiments of the electronic device 100, the housing 110 is mounted to the package substrate 102 to form a hermetically sealed cavity 114 about the device substrate 102 and control circuitry 108. Thus, in the electronic device 700, the cavity 106 formed in the device substrate 104 is enclosed within an outer cavity 114 formed by the housing 110. In some embodiments, the housing 110 is metal, glass, or another material or combination of materials.

The pressure sensors 702 and 704 are disposed to measure the pressure in the inner cavity 106 and the outer cavity 114 respectively. For example, the pressure sensor 702 is coupled to the sealing plate 112 to measure pressure within the inner cavity 106, and the pressure sensor 704 is coupled to the housing 110 to measure pressure within the outer cavity 114. The pressure sensor 702 is coupled to the sealing plate 112 at a location in which the inner cavity 106 is adjacent to the sealing plate 112. Similarly, the pressure sensor 704 is coupled to the housing 110 at a location of the housing 110 most likely to be affected by a change in pressure of the outer cavity 114.

In some embodiments of the electronic device 700, the pressure sensors 702 and 704 are strain gauges that measure the deflection or displacement of the sealing plate 112 and the housing 110 respectively. Displacement of the sealing plate 112 is representative of the pressure within the inner cavity 106. For example, as the forces exerted on the sealing plate 112 by the pressures in the inner cavity 106 and the outer cavity 114 change, the displacement of the sealing plate 112 also changes. FIG. 8 shows an example of displacement of the sealing plate 112 that is measureable by the pressure sensor 702.

Some embodiments of the control circuitry 108 include circuitry to receive signals from the pressure sensors 702 and 704, and to determine values of pressure in the inner cavity 106 and the outer cavity 114 based on the signals. For example, circuits in the control circuitry 108 digitize the signals received from the pressure sensors 702 and 704, and access a table that relates displacement values to cavity pressure values, or evaluate a function that produces cavity pressure values based on the displacement values. In such embodiments, the control circuitry 108 includes an analog-to-digital converter to digitize the signals generated by the pressure sensors 702 and 704, a microcontroller and associated programming to generate pressure values based on the digitized signals, or other circuitry suitable for generating pressure values based on displacement signals.

In some embodiments of the electronic device 700, the pressure sensors 702 and 704 are acoustic transducers that detect vibration of the sealing plate 112 and the housing 110 respectively. The resonant frequencies of the sealing plate 106 and the housing 110 are representative of the pressures within the inner cavity 106 and the outer cavity 114. For example, as the pressure within the inner cavity 106 increases the resonant frequency of the sealing plate 112 also increases. Similarly, as the pressure within the outer cavity 114 increases, the resonant frequency of the housing 110 increases. FIG. 9 shows an example of tracking of the resonant frequency of the sealing plate 112.

Some embodiments of the control circuitry 108 include circuits to receive signals from the pressure sensors 702 and 704, and to determine values of pressure in the inner cavity 106 and the outer cavity 114 based on the signals. For example, circuits in the control circuitry 108 digitize the signals received from the pressure sensors 702 and 704, and analyze the frequency content of the signals to determine the mechanical harmonic signature of the sealing plate 112 and/or the housing 110. The control circuitry 108 accesses a table that relates harmonic signature to cavity pressure values, or evaluates a function that produces cavity pressure values based on harmonic signature. In such embodiments, the control circuitry 108 includes an analog-to-digital converter to digitize the signals generated by the pressure sensors 702 and 704, a microcontroller and associated programming, or other suitable circuitry, to analyze the frequency content of the digitized signals, determine a harmonic signature of the sealing plate 112 and/or the housing 110, and determine a value of pressure based on the harmonic signature.

Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims. 

What is claimed is:
 1. An electronic device, comprising: a package substrate; a circuit assembly mounted on the package substrate, the circuit assembly including a first sealed cavity formed in a device substrate; and a housing mounted on the package substrate to form a second sealed cavity about the circuit assembly.
 2. The electronic device of claim 1, wherein the first sealed cavity includes a channel formed in the device substrate and a sealing plate bonded to the device substrate.
 3. The electronic device of claim 2, further comprising a pressure sensor coupled to the sealing plate and configured to measure pressure within the first sealed cavity as a function of displacement of the sealing plate.
 4. The electronic device of claim 2, wherein the sealing plate includes a dielectric membrane.
 5. The electronic device of claim 2, further comprising: an acoustic sensor coupled to the sealing plate and configured to measure vibration of the sealing plate; and control circuitry coupled to the acoustic sensor, the control circuitry configured to determine pressure within the first sealed cavity as a function of the mechanical harmonic signature of the sealing plate.
 6. The electronic device of claim 1, further comprising a pressure sensor coupled to the housing and configured to measure pressure within the second sealed cavity as a function of displacement of the housing.
 7. The electronic device of claim 1, further comprising: an acoustic sensor coupled to the housing and configured to measure vibration of the housing; and control circuitry coupled to the acoustic sensor, the control circuitry configured to determine pressure within the second sealed cavity as a function of the mechanical harmonic signature of the housing.
 8. The electronic device of claim 1, wherein the first sealed cavity is a waveguide of a millimeter-wave wave chip scale atomic clock. 